FPGA TRAININGS - Euler Project

EulerProject with TopTechAcademy Training Center offer certified IntelFPGA trainings to help you sharpen your competitive edge. Take advantage of the interactivity of one of our instructor-led courses

List of trainings

EulerProject team is Gold member of Intel FPGA Design Solutions Network (DSN), with extensive FPGA design experience in PCIe Acceleration Hardware Designs, OpenCL BSP porting and OpenCL application solutions.

Since 2014 we have been working with IntelFPGA OpenCL technology. Based on our own experience with technology combined with IntelFPGA trainings materials we created and offer the following bespoke technical OpenCL trainings to help our Data-center customers get introduced to efficient FPGA technology, get code writing/optimization skills and learn advanced optimization techniques to result into services acceleration and CPUs offloading with time to market reduction and lower deployment risks.

• Introduction to Parallel Computing with OpenCL, 1 day/instructor led class
• OpenCL Programming and Optimization, 1 day/instructor led class
• Advanced Optimization with OpenCL, 1 day/instructor led class
• Advanced Optimizations with OpenCL: HDL inference, Host-pipes and Host-channels, 1 day/instructor led class
• Enabling FPGA Accelerators Using the Acceleration Stack for Intel® Xeon® CPU with FPGAs (coming soon)

I am very happy with the cooperation that has been established between the EulerProjecrt team and the Department of Supercomputers and Quantum Informatics at the Moscow State University. Colleagues are reading a course on the possibility of using modern reconfigurable systems with the help of OpenCL, giving our students the opportunity to feel the cutting edge of science and information technology.

Voevodin V.V.
Professor VMK MSU, Deputy Director, SRC MSU, Corresponding Member of the Russian Academy of Sciences

The construction of high-performance and energy-efficient calculators for solving real problems is a priority in the construction of modern radio engineering systems.

In light of this, the OpenCl technology for reconfigurable FPGA-based platforms, and the design path offered by colleagues from the EulerProject allows rapid development of high-parallel algorithms of digital signal processing. I express my gratitude to the EulerProject team for the conducted master class, which allowed to expand the horizons of the staff of the Institute of Radio Engineering Systems and Management of the Southern Federal University.

Potipak M.V.
Director of the Research and Education Center for System Technologies of Design of SFedU

"The training was really interesting. Thank you for organizing and conducting."

Large Internet company

"We appreciate the hours-days-weeks of efforts of the Euler project team aimed at using accelerating equipment in our complex."

A major information security company

"Useful and interesting training, the topic is practically disclosed. Because the teacher himself is busy writing code, then everything immediately falls into place."

A large company is a developer of radio electronics

"A good training from people who themselves raised this topic and are ready to share practical experience".

Russian financial company

Intel FPGA Technical Training

Video address

Doug Burger - Microsoft

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